| Parameter | Value | | :--- | :--- | | | 48 (often 6x8 array, 0.8mm BGA footprint) | | I/O Standards | LVDS, sub-LVDS, SLVS-400, and 1.8V/2.5V CMOS | | Max Data Rate | 1.2 Gbps per differential pair (aggregate up to 9.6 Gbps) | | Supply Voltage | 1.2V core, 1.8V I/O (with 3.3V tolerance on select pins) | | Termination | On-die programmable 100Ω differential / 50Ω single-ended | | Package | LGA or micro-BGA, 6mm x 6mm | | Operating Temp | -40°C to +85°C (Industrial grade) |
protocol, providing robust communication for lighting, shading, and climate control. Tile Series - HDL Automation hdl-mp4b tile.48
You need to check internal documentation. Look for a design database, RTL source, or a user guide from the IP creator. | Parameter | Value | | :--- |